Silicon on insulator (SOI) technology refers to the use of a layered silicon-insulator-silicon substrate in place of conventional silicon substrates in semiconductor manufacturing. SOI-based devices differ from conventional silicon-built devices in that the silicon junction is above an electrical insulator, typically silicon dioxide.
The implementation of SOI technology is one of several manufacturing strategies employed to allow the continued miniaturization of microelectronic devices, which may be referred to as extending Moore's Law. Reported benefits of SOI technology relative to conventional silicon (bulk complementary metal-oxide-semiconductor CMOS) processing may include, for example, lower parasitic capacitance due to isolation from the bulk silicon, which improves power consumption at matched performance, and resistance to latch-up due to isolation of the n- and p-well structures.
From a manufacturing perspective, SOI substrates are compatible with most conventional fabrication processes. Indeed, an SOI-based process may be implemented without special equipment or significant retooling of an existing factory. The SOI process may be used to form an integrated circuit having a metal-oxide-semiconductor field-effect transistor (MOSFET) area and a radio frequency (RF) area.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.